Altera JESD204B IP Manual de usuario Pagina 15
- Pagina / 158
- Tabla de contenidos
- MARCADORES
Valorado. / 5. Basado en revisión del cliente
Getting Started
3
2015.05.04
UG-01142
Subscribe
Send Feedback
The JESD204B IP core is part of the MegaCore IP Library distributed with the Quartus II software and
downloadable from the Altera website at www.altera.com.
Related Information
Altera Software Installation & Licensing
Introduction to Altera IP Cores
Altera and strategic IP partners offer a broad portfolio of off-the-shelf, configurable IP cores optimized for
Altera devices. The Quartus II software installation includes the Altera IP library. You can integrate
optimized and verified Altera IP cores into your design to shorten design cycles and maximize
performance. You can evaluate any Altera IP core in simulation and compilation in the Quartus II
software. The Quartus II software also supports integration of IP cores from other sources. Use the IP
Catalog to efficiently parameterize and generate synthesis and simulation files for a custom IP variation.
The Altera IP library includes the following categories of IP cores:
• Basic functions
• DSP functions
• Interface protocols
• Low power functions
• Memory interfaces and controllers
• Processors and peripherals
Note:
The IP Catalog (Tools > IP Catalog) and parameter editor replace the MegaWizard
™
Plug-In
Manager for IP selection and parameterization, beginning in Quartus II software version 14.0. Use
the IP Catalog and parameter editor to locate and paramaterize Altera and other supported IP
cores.
Related Information
• IP User Guide Documentation
• Altera IP Release Notes
©
2015 Altera Corporation. All rights reserved. ALTERA, ARRIA, CYCLONE, ENPIRION, MAX, MEGACORE, NIOS, QUARTUS and STRATIX words and logos are
trademarks of Altera Corporation and registered in the U.S. Patent and Trademark Office and in other countries. All other words and logos identified as
trademarks or service marks are the property of their respective holders as described at www.altera.com/common/legal.html. Altera warrants performance
of its semiconductor products to current specifications in accordance with Altera's standard warranty, but reserves the right to make changes to any
products and services at any time without notice. Altera assumes no responsibility or liability arising out of the application or use of any information,
product, or service described herein except as expressly agreed to in writing by Altera. Altera customers are advised to obtain the latest version of device
specifications before relying on any published information and before placing orders for products or services.
ISO
9001:2008
Registered
www.altera.com
101 Innovation Drive, San Jose, CA 95134
- JESD204B IP Core User Guide 1
- Contents 2
- Item Description 4
- Datapath Modes 8
- IP Core Variation 8
- Run-Time Configuration 9
- Channel Bonding 10
- About the JESD204B IP Core 13
- Getting Started 15
- Upgrading IP Cores 16
- IP Core Status Description 17
- Design Walkthrough 20
- Programming an FPGA Device 25
- Pin Assignments 26
- JESD204B IP Core Parameters 30
- Parameter Value Description 31
- JESD204B IP Core Testbench 35
- Configuration Preset Value 36
- Testbench Simulation Flow 37
- Subscribe 38
- Frame Clock 39
- Transmitter 41
- TX Data Link Layer 42
- Configura‐ 43
- Description 43
- MSB 6 5 4 3 2 1 LSB 43
- User Data Phase 44
- Receiver 45
- RX Data Link Layer 46
- Frame Alignment 47
- Lane Alignment 47
- ILAS Data 48
- Initial Lane Synchronization 48
- RX PHY Layer 49
- Operation 50
- Scrambler/Descrambler 51
- SYNC_N Signal 51
- Link Reinitialization 53
- Link Startup Sequence 54
- Device Clock 57
- Link Clock 58
- Local Multi-Frame Clock 59
- Clock Correlation 60
- Reset Scheme 61
- Reset Sequence 62
- Registers 80
- Access Type Definition 81
- Design Example Components 84
- PLL Reconfiguration 85
- Operation Avalon-MM 86
- Interface Signal 86
- Byte Address 86
- Offset (6bits) 86
- Bit Value 86
- Transceiver Reset Controller 87
- Pattern Generator 87
- Pattern Checker 88
- Transport Layer 89
- F Parameter f 90
- (txframe_clk frequency) f 90
- (rxframe_clk frequency) 90
- TX Path Data Remapping 100
- Altera Corporation 100
- Send Feedback 100
- UG-01142 104
- 2015.05.04 104
- F FRAMECLK_DIV TX Latency 105
- Parameter Description Value 106
- Related Information 113
- RX Path Data Remapping 114
- Serial Port Interface (SPI) 117
- Control Unit 118
- Memory Block (ROM) 119
- Finite State Machine (FSM) 120
- System Parameters 121
- Run-Time Reconfiguration 124
- System Interface Signals 125
- Signal Clock 128
- Direction Description 128
- PHY (Stratix V and Arria V) 133
- Implementation Guidelines 139
- Programmable RBD Offset 140
- Programmable LMFC Offset 143
- K K K K K RK K K K K 146
- D D D DK D D 146
- DK D DK K K 146
- Clocking Scheme 148
- JESD204B Parameters 148
- SPI Programming 149
- Additional Information 155
- Date Version Changes 156
- How to Contact Altera 157
- Contact Method Address 158
Relacionado con productos y manuales para Instrumentos de medición Altera JESD204B IP
Instrumentos de medición Altera Nios II Embedded Evaluation Kit Cyclone III Editio Manual de usuario
(3 paginas)
(3 paginas)
Instrumentos de medición Altera Nios II Embedded Evaluation Kit Cyclone III Editio Manual de usuario
(80 paginas)
(80 paginas)
Instrumentos de medición Altera Phase-Locked Loop Reconfiguration IP Core Manual de usuario
(51 paginas)
(51 paginas)
Instrumentos de medición Altera Serial Digital Interface (SDI) MegaCore Function Manual de usuario
(140 paginas)
(140 paginas)
Instrumentos de medición Altera 100G Development Kit, Stratix V GX Edition Manual de usuario
(44 paginas)
(44 paginas)
Instrumentos de medición Altera Stratix V Avalon-MM Interface for PCIe Solutions Manual de usuario
(184 paginas)
(184 paginas)
Instrumentos de medición Altera 10-Gbps Ethernet MAC MegaCore Function Manual de usuario
(175 paginas)
(175 paginas)
© 2020, manymanuals.es. Todos los derechos reservados | 0.045 s |
Manymanuals.com
Manymanuals.de
Manymanuals.fr
Manymanuals.it
Manymanuals.pl
Manymanuals.cz
Manymanuals.es
Manymanuals-pt.com
Comentarios a estos manuales