
ALTFP_ADD_SUB IP Core
5
2014.12.19
UG-01058
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ALTFP_ADD_SUB Features
The ALTFP_ADD_SUB IP core offers the following features:
• Dynamically configurable adder and subtracter functions.
• Optional exception handling output ports such as zero, overflow, underflow, and nan.
• Optimization of speed and area.
ALTFP_ADD_SUB Output Latency
The output latency options for the ALTFP_ADD_SUB IP core are the same for all three precision formats
—single, double, and single-extended. The options available are 7, 8, 9, 10, 11, 12, 13, and 14 clock cycles.
ALTFP_ADD_SUB Truth Table
Table 5-1: Truth Table for Addition/Subtraction Operations
DATAA[] DATAB[] SIGN BIT RESULT[] Overflow Underflow Zero NaN
Normal Normal 0 Zero 0 0 1 0
Normal Normal 0/1 Normal 0 0 0 0
Normal Normal 0/1 Denormal 0 1 1 0
Normal Normal 0/1 Infinity 1 0 0 0
Normal Denormal 0/1 Normal 0 0 0 0
Normal Zero 0/1 Normal 0 0 0 0
Normal Infinity 0/1 Infinity 1 0 0 0
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