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Valorado. / 5. Basado en revisión del cliente
ALTERA_FP_MATRIX_MULT Signals.................................................................................................. 3-4
ALTERA_FP_MATRIX_MULT Parameters...........................................................................................3-5
ALTERA_FP_ACC_CUSTOM IP Core..............................................................4-1
ALTERA_FP_ACC_CUSTOM Features..................................................................................................4-1
ALTERA_FP_ACC_CUSTOM Output Latency.....................................................................................4-1
ALTERA_FP_ACC_CUSTOM Resource Utilization and Performance............................................. 4-1
ALTERA_FP_ACC_CUSTOM Signals.................................................................................................... 4-3
ALTERA_FP_ACC_CUSTOM Parameters.............................................................................................4-4
ALTFP_ADD_SUB IP Core................................................................................5-1
ALTFP_ADD_SUB Features......................................................................................................................5-1
ALTFP_ADD_SUB Output Latency.........................................................................................................5-1
ALTFP_ADD_SUB Truth Table................................................................................................................5-1
ALTFP_ADD_SUB Resource Utilization and Performance................................................................. 5-2
ALTFP_ADD_SUB Design Example: Addition of Double-Precision Format Numbers..................5-3
ALTFP_ADD_SUM Design Example: Understanding the Simulation Results......................5-3
ALTFP_ADD_SUB Signals........................................................................................................................ 5-4
ALTFP_ADD_SUB Parameters.................................................................................................................5-6
ALTFP_DIV IP Core...........................................................................................6-1
ALTFP_DIV Features..................................................................................................................................6-1
ALTFP_DIV Output Latency.....................................................................................................................6-1
ALTFP_DIV Truth Table........................................................................................................................... 6-2
ALTFP_DIV Resource Utilization and Performance.............................................................................6-3
ALTFP_DIV Design Example: Division of Single-Precision.................................................................6-4
ALTFP_DIV Design Example: Understanding the Simulation Results...................................6-4
ALTFP_DIV Signals....................................................................................................................................6-6
ALTFP_DIV Parameters.............................................................................................................................6-7
ALTFP_MULT IP Core....................................................................................... 7-1
ALTFP_MULT IP Core Features...............................................................................................................7-1
ALTFP_MULT Output Latency................................................................................................................ 7-1
ALTFP_MULT Truth Table.......................................................................................................................7-1
ALTFP_MULT Resource Utilization and Performance.........................................................................7-2
ALTFP_MULT Design Example: Multiplication of Double-Precision Format Numbers................7-3
ALTFP_MULT Design Example: Understanding the Simulation Waveform........................7-3
Parameters.....................................................................................................................................................7-4
ALTFP_MULT Signals................................................................................................................................7-5
ALTFP_SQRT......................................................................................................8-1
ALTFP_SQRT Features...............................................................................................................................8-1
Output Latency.............................................................................................................................................8-1
ALTFP_SQRT Truth Table........................................................................................................................ 8-2
ALTFP_SQRT Resource Utilization and Performance..........................................................................8-3
TOC-3
Altera Corporation
- 101 Innovation Drive 1
- San Jose, CA 95134 1
- Contents 2
- About Floating-Point IP Cores 7
- Design Flow 8
- Using the Parameter Editor 10
- File Name Description 12
- Upgrading IP Cores 15
- Related Information 18
- Floating-Point Formats 19
- Special Case Numbers 20
- Non-IEEE-754 Standard Format 21
- Integer bits 22
- Fraction bits 22
- VHDL Component Declaration 24
- VHDL LIBRARY-USE Declaration 24
- ALTERA_FP_MATRIX_INV IP Core 25
- Triangular Matrix Inversion 29
- Matrix Multiplication 29
- Matrix Inversion Operation 29
- Precision Format Numbers 30
- Sample Matrix Data 32
- Matrix Data 33
- ALTERA_FP_MATRIX_INV Signals 34
- ALTERA_FP_MATRIX_MULT IP Core 36
- . . . N-10 . . 38
- . . . N-10 38
- ALTERA_FP_MATRIX_MULT 39
- Parameter Value Description 40
- ALTERA_FP_ACC_CUSTOM IP Core 42
- ALTERA_FP_ACC_CUSTOM Signals 44
- ALTFP_ADD_SUB IP Core 48
- ALTFP_ADD_SUB Signals 51
- ALTFP_ADD_SUB 52
- ALTFP_ADD_SUB Parameters 53
- ALTFP_DIV IP Core 55
- ALTFP_DIV Truth Table 56
- ALTFP_DIV Signals 60
- ALTFP_DIV Parameters 61
- ALTFP_MULT IP Core 63
- Parameters 66
- ALTFP_MULT Signals 67
- ALTFP_SQRT 69
- ALTFP_SQRT Truth Table 70
- ALTFP_SQRT Signals 72
- ALTFP_SQRT Parameters 74
- ALTFP_EXP IP Core 75
- ALTFP_EXP Signals 78
- ALTFP_EXP 79
- ALTFP_EXP Parameters 80
- ALTFP_INV IP Core 81
- ALTFP_INV_SQRT IP Core 87
- ALTFP_INV_SQRT 90
- ALTFP_LOG 93
- ALTFP_ATAN IP Core 99
- ALTFP_ATAN Parameters 100
- Parameter 101
- Type Required Description 101
- ALTFP_SINCOS IP Core 102
- ALTFP_SINCOS Signals 103
- ALTFP_SINCOS Parameters 104
- ALTFP_ABS IP Core 105
- UG-01058 106
- 2014.12.19 106
- ALTFP_ABS Signals 107
- ALTFP_ABS 108
- ALTFP_ABS Parameters 109
- ALTFP_COMPARE IP Core 111
- Format Numbers 112
- ALTFP_COMPARE Signals 113
- ALTFP_COMPARE Parameters 114
- ALTFP_CONVERT IP Core 116
- ALTFP_CONVERT Output Latency 117
- Point Format Numbers 121
- Time Event 122
- ALTFP_CONVERT Signals 123
- ALTFP_CONVERT Parameters 125
- ALTERA_FP_FUNCTIONS IP Core 128
- Function Description 129
- ALTERA_FP_FUNCTIONS Signals 151
- Altera Corporation 152
- Send Feedback 152
- Document Revision History 156
- Date Document 157
- Changes Made 157
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