
Table 17-3: Latency Options for Each Operation
Operation Conversion From Latency (in clock cycles)
Integer-to-Float N/A 6
Float-to-Integer N/A 6
Float-to-Float
Single-precision format 2
Double-precision format 3
Single-extended precision format 3
Fixed-to-Float N/A 6
Float-to-Fixed N/A 6
ALTFP_CONVERT Resource Utilization and Performance
This table lists the resource utilization and performance information for the ALTFP_CONVERT IP core.
The information was derived using the Quartus II software version 10.0.
Table 17-4: ALTFP_CONVERT Resource Utilization and Performance for Stratix III Devices
Operation Format Pipeline
Logic Usage
f
MAX
(MHz)
Adaptive
Look-Up
Tables
(ALUTs)
Dedicated
Logic
Registers
(DLRs)
Adaptive
Logic
Modules
(ALMs)
Integer to-Float
32-bit
integer to
single-
precision
6 182 238 157 515
32-bit
integer to
double-
precision
6 150 139 123 510
64-bit
integer to
single-
precision
6 385 371 296 336
64-bit
integer to
single-
precision
6 393 461 344 336
UG-01058
2014.12.19
ALTFP_CONVERT Resource Utilization and Performance
17-3
ALTFP_CONVERT IP Core
Altera Corporation
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