Altera Arria V SoC Development Board Manual de usuario descargar pdf (Pagina 47)

Chapter 2: Board Components 2–39

Memory

July 2014 Altera Corporation Arria V SoC Development Board

Reference Manual

Memory

This section describes the development board’s memory interface support and also

their signal names, types, and connectivity relative to the Arria V SoC. The

development board has the following memory interfaces:

■ DDR3 SDRAM (FPGA)

■ DDR3 SDRAM (HPS)

■ QSPI flash (HPS)

■ EPCQ flash

■ Synchronous flash

■ Micro SD flash memory

■ I

C EEPROM

f For more information about the memory interfaces, refer to the following documents:

■ Timing Analysis section in the External Memory Interface Handbook.

■ DDR, DDR2, and DDR3 SDRAM Design Tutorials section in the External Memory

Interface Handbook.

DDR3 SDRAM (FPGA)

The development board supports two 32Mx16x8 DDR3 SDRAM interface for very

high-speed sequential memory access. The 32-bit data bus comprises of two ×16

devices with a single address or command bus. This interface connects to the

dedicated HMC I/O banks on the bottom edge of the FPGA.

The DDR3 device shipped with this board are running at 533 MHz, for a total

theoretical bandwidth of over 25.6 Gbps. The speed grade of this DDR3 device is

800 MHz with a CAS latency of 9.

Table 2–27 lists the DDR3 SDRAM pin assignments, signal names, and functions. The

signal names and types are relative to the Arria V SoC in terms of I/O setting and

direction.

Table 2–27. DDR3 SDRAM Pin Assignments, Schematic Signal Names, and Functions (Part 1 of 7)

Board

Reference

Schematic

Signal Name

Arria V SoC Pin

Number

I/O Standard Description

DDR3 x32 (U37)

DDR3A_A0

AU29 1.5-V SSTL Class I Address bus

DDR3A_A1

AT29 1.5-V SSTL Class I Address bus

DDR3A_A2

AV30 1.5-V SSTL Class I Address bus

DDR3A_A3

AU30 1.5-V SSTL Class I Address bus

DDR3A_A4

AT30 1.5-V SSTL Class I Address bus

DDR3A_A5

AR30 1.5-V SSTL Class I Address bus

DDR3A_A6

AL30 1.5-V SSTL Class I Address bus

DDR3A_A7

AK30 1.5-V SSTL Class I Address bus

1 2 ... 42 43 44 45 46 47 48 49 50 51 52 ... 69 70

Comentarios a estos manuales

Sin comentarios

Altera Arria V SoC Development Board Manual de usuario Pagina 47

Comentarios a estos manuales

Relacionado con productos y manuales para Instrumentos de medición Altera Arria V SoC Development Board