Altera Arria 10 Avalon-MM DMA Manual de usuario Pagina 26
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Parameter Value Description
Enable control register
access (CRA) Avalon-MM
slave port
On/Off
Allows read and write access to bridge registers from the
interconnect fabric using a specialized slave port. This
option is required for Requester/Completer variants
and optional for Completer Only variants. Enabling
this option allows read and write access to bridge
registers, except in the Completer-Only single dword
variations.
Export MSI/MSI-X
conduit interfaces
On/Off
When you turn this option on, the core exports
top-level MSI and MSI-X interfaces that you can use to
implement a Custom Interrupt Handler for MSI and
MSI-X interrupts. For more information about the
Custom Interrupt Handler, refer to Interrupts for End
Points Using the Avalon-MM Interface with Multiple
MSI/MSI
-
X Support. If you turn this option Off, the
core handles interrupts internally.
If you select this option, you must design your own
external descriptor controller. The embedded controller
does not support MSI-X.
Enable PCIe interrupt at
power-on
On/Off
When you turn this option on, the Avalon-MM Arria 10
Hard IP for PCI Express enables the interrupt register at
power-up. Turning off this option disables the interrupt
register at power-up. The setting does not affect run-
time configuration of the interrupt enable register.
For the Avalon-MM interface with DMA, this value
must be off.
Enable Hard IP Status
Bus when using the
AVMM interface
On/Off When you turn this option on, your top-level variant
includes the following top-level signals:
• Link status signals
• ECC error signals
• TX and RX parity error signals
• Completion header and data signals, indicating the
total number of Completion TLPs currently stored in
the RX buffer.
Instantiate internal
descriptor controller
On/Off When you turn this option on, the descriptor controller
is included in the Avalon-MM bridge. When you turn
this option off, the descriptor controller should be
included as a separate external component. Turn this
option on, if you plan to use the Altera-provided
descriptor controller in your design. Turn this option
off if you plan to modify or replace the descriptor
controller logic in your design.
3-6
Interface System Settings
UG-01145_avmm_dma
2015.05.14
Altera Corporation
Parameter Settings
Send Feedback
- PCIe Solutions 1
- Contents 2
- Datasheet 5
- Link Width 6
- ×2 ×4 ×8 6
- Features 6
- Interface 7
- UG-01145_avmm_dma 10
- 2015.05.14 10
- Device Family Support 11
- Related Information 11
- Recommended Speed Grades 12
- Subscribe 14
- <install_dir>/ 14
- Parameter Value 16
- Directory Description 17
- Time TLP Type Payload 17
- TLP Header 17
- Creating a Quartus II Project 18
- Compiling the Design 19
- Parameter Settings 21
- Parameter Value Description 22
- Interface System Settings 25
- Error Reporting 30
- PCIe Address Space Settings 33
- IP Core Interfaces 42
- Reset & 44
- Lock Status 44
- RX Master Module 46
- TX Slave Module 48
- Signal Name Directio 49
- Description 49
- Bits Name Description 51
- Clock Signals 55
- Signal Direction Description 55
- MSI Interrupts for Endpoints 60
- Registers 70
- Altera-Defined VSEC Registers 77
- CvP Registers 78
- Bits Register Description 82
- Register Access Description 86
- Register Name 91
- Byte Offset 95
- Register Dir Description 95
- Arria 10 Reset and Clocks 100
- Clock Domains 103
- Name Frequency Clock Domain 104
- Error Handling 106
- Data Link Layer Errors 107
- Physical Layer Errors 107
- Error Type Description 107
- Transaction Layer Errors 108
- Status Bit Conditions 111
- Altera Corporation 112
- Send Feedback 112
- IP Core Architecture 113
- Hard IP for PCI Express 114
- Top-Level Interfaces 115
- Data Link Layer 116
- Physical Layer 118
- TX Packets 119
- Altera FPGA 121
- Qsys System 122
- Design Implementation 124
- SDC Timing Constraints 125
- Frequently Asked Questions 126
- Additional Information 127
- Date Version Changes Made 128
- How to Contact Altera 130
- Contact 130
- Contact Method Address 130
- Typographic Conventions 131
- Visual Cue Meaning 131
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