Altera 100G Development Kit, Stratix IV GT Edition Manual de usuario descargar pdf (Pagina 59)

Chapter 2: Board Components 2–51

Components and Interfaces

September 2010 Altera Corporation 100G Development Kit, Stratix IV GT Edition Reference Manual

U39.P7, U38.P7 Address bus

DDR3B_A1

U44.P22 —

U39.P3, U38.P3 Address bus

DDR3B_A2

U44.N21 —

U39.N2, U38.N2 Address bus

DDR3B_A3

U44.F22 —

U39.P8, U38.P8 Address bus

DDR3B_A4

U44.R22 —

U39.P2, U38.P2 Address bus

DDR3B_A5

U44.B20 —

U39.R8, U38.R8 Address bus

DDR3B_A6

U44.R21 —

U39.R2, U38.R2 Address bus

DDR3B_A7

U44.E22 —

U39.T8, U38.T8 Address bus

DDR3B_A8

U44.T21 —

U39.R3, U38.R3 Address bus

DDR3B_A9

U44.N22 —

U39.L7, U38.L7 Address bus

DDR3B_A10

U44.G19 —

U39.R7, U38.R7 Address bus

DDR3B_A11

U44.P20 —

U39.N7, U38.N7 Address bus

DDR3B_A12

U44.L20 —

U39.M2, U38.M2 Bank address bus

DDR3B_BA0

U44.F21 —

U39.N8, U38.N8 Bank address bus

DDR3B_BA1

U44.N20 —

U39.M3, U38.M3 Bank address bus

DDR3B_BA2

U44.F19 —

U39.K3, U38.K3 Column address select

DDR3B_CASN

U44.F20 —

U39.K7, U38.K7 Clock input N

DDR3B_CK_N

U44.G20 —

U38.J7, U39.J7 Clock input P

DDR3B_CK_P

U44.H20 —

U38.K9, U39.K9 Clock enable

DDR3B_CKE

U44.J22 —

U38.L2, U39.L2 Chip select

DDR3B_CSN

U44.B22 —

U38.E3 Data bus

DDR3B_DQ0

U44.B19 —

U38.F7 Data bus

DDR3B_DQ1

U44.B17 —

U38.F2 Data bus

DDR3B_DQ2

U44.A20 —

U38.F8 Data bus

DDR3B_DQ3

U44.A16 —

U38.H3 Data bus

DDR3B_DQ4

U44.B16 —

U38.H8 Data bus

DDR3B_DQ5

U44.A14 —

U38.G2 Data bus

DDR3B_DQ6

U44.A17 —

U38.H7 Data bus

DDR3B_DQ7

U44.A15 —

U38.D7 Data bus

DDR3B_DQ8

U44.D16 —

U38.C3 Data bus

DDR3B_DQ9

U44.E16 —

U38.C8 Data bus

DDR3B_DQ10

U44.D15 —

U38.C2 Data bus

DDR3B_DQ11

U44.F16 —

U38.A7 Data bus

DDR3B_DQ12

U44.F15 —

U38.A2 Data bus

DDR3B_DQ13

U44.D18 —

U38.B8 Data bus

DDR3B_DQ14

U44.C15 —

U38.A3 Data bus

DDR3B_DQ15

U44.C17 —

U39.E3 Data bus

DDR3B_DQ16

U44.J18 —

U39.F7 Data bus

DDR3B_DQ17

U44.K16 —

Table 2–37. DDR3 Interface Pin Assignments, Schematic Signal Names, and Functions (Part 3 of 8)

Board Reference Description

Schematic

Signal Name

Stratix IV GT

Device

Pin Name

Other

Connections

1 2 ... 54 55 56 57 58 59 60 61 62 63 64 ... 79 80

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Altera 100G Development Kit, Stratix IV GT Edition Manual de usuario Pagina 59

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