Altera PHY IP Core Guía de usuario Pagina 29
- Pagina / 230
- Tabla de contenidos
- MARCADORES
Valorado. / 5. Basado en revisión del cliente
Chapter 3: 10GBASE-R PHY IP Core 3–11
Interfaces
March 2012 Altera Corporation Altera Transceiver PHY IP Core
User Guide
h For more information about the Pin Planner, refer to About the Pin Planner in
Quartus II Help. For more information about the Assignment Editor, refer to About
the Assignment Editor in Quartus II Help.
f For more information about Quartus II Settings, refer to Quartus II Settings File
Manual.
Interfaces
This section describes interfaces of the 10GBASE-R PHY IP Core. It includes the
following topics:
■ Ports
■ Register Interface
■ Dynamic Reconfiguration
Ports
Figure 3–3 illustrates the top-level signals of the 10BASE-R PHY.
1 The block diagram shown in the GUI labels the external pins with the interface type
and places the interface name inside the box. The interface type and name are used in
the Hardware Component Description File (_hw.tcl). If you turn on Show signals, the
block diagram displays all top-level signal names.
f For more information about _hw.tcl files refer to refer to the Component Interface Tcl
Reference chapter in volume 1 of the Quartus II Handbook.
The following sections describe the signals in each interface.
Figure 3–3. 10GBASE-R PHY Top-Level Signals
f
xgmii_tx_dc
<n>
[71:0]
tx_ready
xgmii_tx_clk
xgmii_rx_dc
<n>
[71:0]
rx_ready
rx_data_ready[
<n>
-1:0]
xgmii_rx_clk
phy_mgmt_clk
phy_mgmt_clk_reset
phy_mgmt_addr[8:0]
phy_mgmt_writedata[31:0]
phy_mgmt_readdata[31:0]
phy_mgmt_write
phy_mgmt_read
phy_mgmt_waitrequest
10GBASE-R Top-Level Signals
Clock
Signals for
External PMA and
Reconfiguration
Stratix IV Devices
Reconfiguration
Stratix V Devices
rx_serial_data
<n>
tx_serial_data
<n>
gxb_pdn
pll_locked
pll_pdn
cal_blk_pdn
rx_recovered_clk[
<n>
]
reconfig_to_xcvr[3:0]
reconfig_from_xcvr[
<n>
/4)17-1:0]
reconfig_to_xcvr[(
<n>
70-1):0]
reconfig_from_xcvr[(
<n>
46-1):0]
rx_block_lock
rx_hi_ber
pll_ref_clk
Transceiver
Serial Data
SDR XGMII Tx
Inputs from MAC
SDR XGMII Rx
Outputs from PCS
towards MAC
Avalon-MM PHY
Management
Interface
Status
- User Guide 1
- Contents 3
- Chapter 7. Custom PHY IP Core 5
- Contents vi 6
- 1. Introduction 9
- Stratix V Device 10
- Reset Controller 11
- Avalon-MM PHY Management 11
- 1–4 Chapter 1: Introduction 12
- Unsupported Features 13
- 1–6 Chapter 1: Introduction 14
- 2. Getting Started 15
- Note to Figure2–2: 16
- Simulate the IP Core 18
- 3. 10GBASE-R PHY IP Core 19
- Release Information 20
- Note to Table 3–1: 21
- Stratix IV Devices 23
- Stratix V Devices 24
- SDR XGMII TX Interface 30
- Note to Table 3–9: 30
- SDR XGMII RX Interface 31
- Note to Table 3–11: 31
- Status Interface 32
- Clocks, Reset, and Powerdown 32
- Serial Interface 35
- Note to Table 3–15: 35
- TimeQuest Timing Constraints 40
- Note to Figure4–1: 43
- Note to Table 4–1: 44
- Advanced Options 51
- Configurations 52
- PMA Channel Controller 58
- Stratix IV GX Devices 65
- 5. Interlaken PHY IP Core 67
- Analog Settings 70
- Note to Figure5–2: 74
- Avalon-ST TX Interface 75
- Avalon-ST RX Interface 76
- PLL Interface 78
- TX and RX Serial Interface 78
- Optional Clocks for Deskew 78
- Transceiver Reconfiguration 81
- General Options 84
- Note to Figure6–2: 90
- PIPE Interface 92
- Note to Table 6–8: 93
- Transceiver Serial Interface 94
- Registers 95
- 7. Custom PHY IP Core 101
- Device Family Support 102
- Parameter Settings 103
- Word Alignment 106
- Rate Match FIFO 107
- 8B/10B Encoder and Decoder 108
- Byte Ordering 108
- PLL Reconfiguration 109
- Analog Options 110
- Presets for Ethernet 114
- Interfaces 115
- Note to Figure7–2: 116
- Clock Interface 118
- Status Signals (Optional) 118
- Note to Table 7–17: 119
- Register Interface 120
- Register Descriptions 121
- Dynamic Reconfiguration 124
- 8. Low Latency PHY IP Core 125
- Note to Table 8–4: 129
- Note to Table 8–5: 130
- Serial Data Interface 137
- Optional Status Interface 138
- PMA and Light-Weight PCS 139
- Arria V or Stratix V FPGA 143
- Auto-Negotiation 144
- Delay Estimation Logic 145
- Note to Figure9–2: 145
- Delay Numbers 146
- Note to Table 9–4: 147
- Additional Options 150
- TX and RX Status Signals 159
- Deterministic PHY IP Core 161
- Controller 167
- Note to Figure10–1: 169
- Note to Table 10–6: 174
- Embedded 175
- Offset Cancellation 176
- Duty Cycle Calibration 176
- PMA Analog Controls 177
- Pre-CDR Reverse Serial 178
- Loopback 178
- Post-CDR Reverse Serial 178
- ATX PLL Calibration 183
- Channel Reconfiguration 187
- Streamer Module 188
- Stratix V MIF 191
- Register-Based Write 193
- Register-Based Read 193
- Direct Write Reconfiguration 195
- Figure 10–6. Sample MIF 196
- Example 10–5. (continued) 197
- Notes to Figure 10–14: 205
- Transceiver 206
- XAUI PHY 209
- Port Differences 210
- Note to Table 11–3: 212
- Note to Table 11–5: 215
- Custom PHY 216
- Note to Table 11–6: 217
- Note to Table 11–7: 218
- Additional Information 219
- Revision History 220
- Note to Table: 228
- Typographic Conventions 229
Relacionado con productos y manuales para Software Altera PHY IP Core
Software Altera UG-01080 Guía de usuario
(120 paginas)
(120 paginas)
Software Altera DE2-115 Guía de usuario
(107 paginas)
(107 paginas)
Software Altera UG-01080 Guía de usuario
(484 paginas)
(484 paginas)
ZyXEL Communications ZyXEL Dimension GS-1124A manuály
Uživatelské manuály a uživatelské příručky pro Počítačové příslušenství ZyXEL Communications ZyXEL Dimension GS-1124A.
Poskytujeme 1 manuály pdf ZyXEL Communications ZyXEL Dimension GS-1124A ke stažení zdarma podle typů dokumentů: Uživatelský manuál
Zyxel communications ZyXEL Dimension GS-1124A Uživatelský manuál (30 strany)
Značka: Zyxel-communications | Kategorie: Computer Accessories | Velikost: 1.11 MB |
Tabulka s obsahem
Další produkty a příručky pro Počítačové příslušenství ZyXEL Communications
| Modely | Typ Dokumentu |
|---|---|
| GS-2750 |
Uživatelský manuál
ZyXEL Communications GS-2750 User Manual,
336 stránky
|
| DIMENSION ES-4024 |
Uživatelský manuál
ZyXEL Communications DIMENSION ES-4024 User Manual,
4 stránky
|
| ZyXEL Dimension ES-2108-F |
Uživatelský manuál
    
ZyXEL Communications ZyXEL Dimension ES-2108-F User Manual,
43 stránky
|
| ZyXEL P-872H |
Uživatelský manuál
ZyXEL Communications ZyXEL P-872H User Manual,
8 stránky
|
| ES-315 |
Uživatelský manuál
ZyXEL Communications ES-315 User Manual,
166 stránky
|
| GS-108A |
Uživatelský manuál
ZyXEL Communications GS-108A User Manual,
2 stránky
|
| GS-4012F/4024 |
Uživatelský manuál
ZyXEL Communications GS-4012F/4024 User Manual,
363 stránky
|
© 2020, manymanuals.es. Todos los derechos reservados | 0.033 s |
Manymanuals.com
Manymanuals.de
Manymanuals.fr
Manymanuals.it
Manymanuals.pl
Manymanuals.cz
Manymanuals.es
Manymanuals-pt.com
Comentarios a estos manuales