
2–28 Chapter 2: Board Components
General User Input/Output
Transceiver Signal Integrity Development Kit May 2014 Altera Corporation
Stratix V GT Edition Reference Manual
Table 2–21 lists the backplane connector component reference and the manufacturing
information.
General User Input/Output
This section describes the user I/O interface to the FPGA. This section describes the
following I/O elements:
■ User-defined push buttons
■ User-defined DIP switch
■ User-defined LEDs
■ Character LCD
User-Defined Push Buttons
The development board includes four user-defined push buttons that allow you to
interact with the Stratix V GT device. When you press and hold down the push
button, the device pin is set to logic 0; when you release the push button, the device
pin is set to logic 1. There is no board-specific function for these general user push
buttons.
Table 2–22 lists the user-defined push button schematic signal names and their
corresponding Stratix V GT device pin numbers.
Table 2–23 lists the user-defined push button component reference and the
manufacturing information.
Table 2–21. User-Defined Push Button Component Reference and Manufacturing Information
Board
Reference
Description Manufacturer
Manufacturer
Part Number
Manufacturer
Website
J32
Connector, 4-pair, 6 position, Amphenol
Xcede
Amphenol AX400-00682 www.amphenol.com
J33
Connector, 8-pair, 6-columns, receptacle,
Tyco Strada
Tyco Electronics 2149323-1 www.te.com
J34 Connector, 4-pair, receptacle, Molex Impact Molex 76160-5020 www.molex.com
Table 2–22. User-Defined Push Button Schematic Signal Names and Functions
Board Reference Schematic Signal Name I/O Standard Stratix V GT Device Pin Number
S1
USER_PB0
2.5-V H29
S2
USER_PB1
2.5-V G28
S3
USER_PB2
2.5-V K27
S4
USER_PB3
2.5-V J27
Table 2–23. User-Defined Push Button Component Reference and Manufacturing Information
Board Reference Description Manufacturer
Manufacturer
Part Number
Manufacturer Website
S1–S4 Push button Panasonic Corporation EVQPAC07K www.panasonic.com
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