
68
DRAM_DQ[3] PIN_W1 SDRAM Data[3] 3.3V
DRAM_DQ[4] PIN_V3 SDRAM Data[4] 3.3V
DRAM_DQ[5] PIN_V2 SDRAM Data[5] 3.3V
DRAM_DQ[6] PIN_V1 SDRAM Data[6] 3.3V
DRAM_DQ[7] PIN_U3 SDRAM Data[7] 3.3V
DRAM_DQ[8] PIN_Y3 SDRAM Data[8] 3.3V
DRAM_DQ[9] PIN_Y4 SDRAM Data[9] 3.3V
DRAM_DQ[10] PIN_AB1 SDRAM Data[10] 3.3V
DRAM_DQ[11] PIN_AA3 SDRAM Data[11] 3.3V
DRAM_DQ[12] PIN_AB2 SDRAM Data[12] 3.3V
DRAM_DQ[13] PIN_AC1 SDRAM Data[13] 3.3V
DRAM_DQ[14] PIN_AB3 SDRAM Data[14] 3.3V
DRAM_DQ[15] PIN_AC2 SDRAM Data[15] 3.3V
DRAM_DQ[16] PIN_M8 SDRAM Data[16] 3.3V
DRAM_DQ[17] PIN_L8 SDRAM Data[17] 3.3V
DRAM_DQ[18] PIN_P2 SDRAM Data[18] 3.3V
DRAM_DQ[19] PIN_N3 SDRAM Data[19] 3.3V
DRAM_DQ[20] PIN_N4 SDRAM Data[20] 3.3V
DRAM_DQ[21] PIN_M4 SDRAM Data[21] 3.3V
DRAM_DQ[22] PIN_M7 SDRAM Data[22] 3.3V
DRAM_DQ[23] PIN_L7 SDRAM Data[23] 3.3V
DRAM_DQ[24] PIN_U5 SDRAM Data[24] 3.3V
DRAM_DQ[25] PIN_R7 SDRAM Data[25] 3.3V
DRAM_DQ[26] PIN_R1 SDRAM Data[26] 3.3V
DRAM_DQ[27] PIN_R2 SDRAM Data[27] 3.3V
DRAM_DQ[28] PIN_R3 SDRAM Data[28] 3.3V
DRAM_DQ[29] PIN_T3 SDRAM Data[29] 3.3V
DRAM_DQ[30] PIN_U4 SDRAM Data[30] 3.3V
DRAM_DQ[31] PIN_U1 SDRAM Data[31] 3.3V
DRAM_BA[0] PIN_U7 SDRAM Bank Address[0] 3.3V
DRAM_BA[1] PIN_R4 SDRAM Bank Address[1] 3.3V
DRAM_DQM[0] PIN_U2 SDRAM byte Data Mask[0] 3.3V
DRAM_DQM[1] PIN_W4 SDRAM byte Data Mask[1] 3.3V
DRAM_DQM[2] PIN_K8 SDRAM byte Data Mask[2] 3.3V
DRAM_DQM[3] PIN_N8 SDRAM byte Data Mask[3] 3.3V
DRAM_RAS_N PIN_U6 SDRAM Row Address Strobe 3.3V
DRAM_CAS_N PIN_V7 SDRAM Column Address Strobe 3.3V
DRAM_CKE PIN_AA6 SDRAM Clock Enable 3.3V
DRAM_CLK PIN_AE5 SDRAM Clock 3.3V
DRAM_WE_N PIN_V6 SDRAM Write Enable 3.3V
DRAM_CS_N PIN_T4 SDRAM Chip Select 3.3V
Table 4-29 Flash Pin Assignments
Signal Name FPGA Pin No.
Description I/O Standard
FL_ADDR[0] PIN_AG12 FLASH Address[0] 3.3V
Comentarios a estos manuales