Altera Nios Development Board Manual de usuario Pagina 47
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- Tabla de contenidos
- MARCADORES
Valorado. / 5. Basado en revisión del cliente
Altera Corporation A–3
July 2005
Note to Ta b l e A – 9 :
(1) This pin is NC for AM29LV128M but is provided for compatible devices that have the active pin A23.
Pin
Name
Pin #
Pin
Name
Pin #
Pin
Name
Pin #
Pin
Name
Pin #
Pin
Name
Pin #
FLASH_CS_n
Chip Select
IO AE4
CE_n
32
FLASH_OE-N
Read Enable
IO AB9
OE_n
34
FLASH_RW-N
Write Enable
IO AD6
WE_n
13
FLASH_WP_N
Write
Protect/ACC
IO Y6
WE_n.ACC
16
FLASH _BYTE_N
Byte Enable
IO AB11
BYTE_n
53
FLASH_RESET_N
Reset Reset_n
14
FLASH_RY-BY_N
Ready/Busy
IO AE6
RY/BY_n
17
SRAM_BE_N0
Byte Enable 0
IO K20 BE0# 39
SRAM_BE_N1
Byte Enable 1
IO K19 BE1# 40
SRAM_BE_N2
Byte Enable 2
IO K22 BE2# 39
SRAM_BE_N3
Byte Enable 3
IO K21 BE3# 40
SRAM_CS_N
Chip Select
IO J19 CS_n 6 CS_n 6
SRAM_OE_N
Read Enable
IO J22 OE_n41OE_n41
SRAM_WE_N
Write Enable
IO J21 WE_n 17 WE_n 17
ENET_ADS_N
Address
Strobe
IO AD2
ADS#
37
ENET_AEN
Address
Enable
IO AF10
AEN
41
ENET_BE_N0
Byte Enable 0
IO AD8
BE0#
94
ENET_BE_N1
Byte Enable 1
IO AF9
BE1#
95
ENET_BE_N2
Byte Enable 2
IO Y11
BE2#
96
ENET_BE_N3
Byte Enable 3
IO W12
BE3#
97
ENET_CYCLE_N
Bus Cycle
IO AC9
CYCLE#
35
ENET_DATACS_N
Data Chip
Select
IO Y12
DATACS
#
34
ENET_INTRQ0
Interrupt
IO AD11
INTRO
29
ENET_IOCHRDY
IO Char
Ready
IO AD1
ARDY
38
ENET_IOR_N
Read
IO AC10
RD#
31
ENET_IOW_N
Write
IO AE11
WR#
32
ENET_LCLK
Local Bus
Clock
IO W11
LCLK
42
ENET_LDEV_N
Local Device
IO Y7
LDEV#
45
ENET_RDYRTN_N
Ready Return
IO V12
RDYRTN
#
46
ENET_W_R_N
Write/Read
IO AC8
W/R#
36
Table A–9. Shared Bus Table (Part 3 of 3)
NET Name
NET
Description
PLD (U60) Flash (U5) SRAM (U35) SRAM (U36) Ethernet (U4)
- Nios Development Board 1
- MNL-N832T4-1.2 2
- Contents 3
- Shared Bus Table 1 4
- About this Manual 5
- How to Contact 6
- Typographic 7
- Conventions 7
- July 2005 8
- Typographic Conventions 8
- Introduction 9
- 1–2 Altera Corporation 10
- General Description 10
- Factory 11
- Programmed 11
- Reference 11
- 1–4 Altera Corporation 12
- Board Components 13
- Stratix II Device 15
- Push-Button 17
- Switches (SW0 17
- Individual LEDs 17
- (D0 - D7) 17
- Seven-Segment 18
- LEDs (U8 & U9) 18
- SRAM Memory 18
- (U35 & U36) 18
- Flash Memory 19
- SDRAM Memory 20
- Ethernet 22
- MAC/PHY (U4) 22
- Serial Port 22
- Connectors (J19 22
- & J27) 22
- Expansion 23
- Prototype 23
- Connectors 23
- (PROTO1 & 23
- Altera Corporation 2–17 25
- Note to Figure 2–8 25
- 2–18 Altera Corporation 26
- Altera Corporation 2–19 27
- Notes to Figure 2–10 27
- CompactFlash 28
- Connector 28
- Connector (J25) 31
- 2–24 Altera Corporation 32
- Mictor Connector (J25) 32
- Configuration 33
- Controller 33
- Device (U3) 33
- Factory & User 34
- Configurations 34
- Flash Memory Partitions 35
- User Configuration 36
- Factory Configuration 36
- Persistent Data 36
- Configuration-Status LEDs 37
- SW8 – CPU Reset 38
- SW9 – Factory Config 38
- SW10 – Reset, Config 38
- Connectors (J24 39
- & J5) 39
- 2–32 Altera Corporation 40
- ° compared to J24 41
- Clock Circuitry 42
- Power-Supply 43
- Circuitry 43
- 2–36 Altera Corporation 44
- Power-Supply Circuitry 44
- Appendix A. Shared Bus Table 45
- Shared Data 46
- WE_n.ACC 47
- A–4 Altera Corporation 48
- July 2005 48
- Description 48
- Appendix B. Restoring the 49
- B–2 Altera Corporation 50
- Appendix C. Connecting to the 51
- Board via Ethernet 51
- Connecting the 52
- LCD Screen 52
- Obtaining an IP 52
- LAN Connection 53
- Point–to–Point Connections 54
- Browsing to Your 55
- C–6 Altera Corporation 56
- Browsing to Your Board 56
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