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2–20 Altera Corporation
Nios Development Board Reference Manual, Stratix II Edition July 2005
CompactFlash Connector (CON3)
CompactFlash
Connector
(CON3)
The CompactFlash connector header (CON3) enables hardware designs
to access a CompactFlash card. See Figure 2–11. The following two access
modes are supported:
■ ATA (hot swappable mode)
■ IDE (IDE hard disk mode)
Figure 2–11. CompactFlash Connector
Most pins of CON3 connect to I/O pins on the FPGA. The following pins
have special connections:
■ Pin 13 of CON3 (VCC) is driven by a power MOSFET that is
controlled by an FPGA I/O pin. This allows the FPGA to control
power to the CompactFlash card for the IDE connection mode.
■ Pin 26 of CON3 (-CD1) is pulled up to 5V through a 10 Kohm resistor.
This signal is used to detect the presence of a CompactFlash card;
when the card is not present, the signal is pulled high through the
pull-up resistor.
■ Pin 41 of CON3 (RESET) is pulled up to 5V through a 10 Kohm
resistor, and is controlled by the EPM7128AE configuration
controller. The FPGA can cause the configuration controller to assert
RESET, but the FPGA does not drive this signal directly.
1 The CompactFlash connector shares several Stratix II I/O pins
with expansion prototype connector PROTO1. See “Expansion
Prototype Connectors (PROTO1 & PROTO2)” on page 2–15 for
details on PROTO1.
- Nios Development Board 1
- MNL-N832T4-1.2 2
- Contents 3
- Shared Bus Table 1 4
- About this Manual 5
- How to Contact 6
- Typographic 7
- Conventions 7
- July 2005 8
- Typographic Conventions 8
- Introduction 9
- 1–2 Altera Corporation 10
- General Description 10
- Factory 11
- Programmed 11
- Reference 11
- 1–4 Altera Corporation 12
- Board Components 13
- Stratix II Device 15
- Push-Button 17
- Switches (SW0 17
- Individual LEDs 17
- (D0 - D7) 17
- Seven-Segment 18
- LEDs (U8 & U9) 18
- SRAM Memory 18
- (U35 & U36) 18
- Flash Memory 19
- SDRAM Memory 20
- Ethernet 22
- MAC/PHY (U4) 22
- Serial Port 22
- Connectors (J19 22
- & J27) 22
- Expansion 23
- Prototype 23
- Connectors 23
- (PROTO1 & 23
- Altera Corporation 2–17 25
- Note to Figure 2–8 25
- 2–18 Altera Corporation 26
- Altera Corporation 2–19 27
- Notes to Figure 2–10 27
- CompactFlash 28
- Connector 28
- Connector (J25) 31
- 2–24 Altera Corporation 32
- Mictor Connector (J25) 32
- Configuration 33
- Controller 33
- Device (U3) 33
- Factory & User 34
- Configurations 34
- Flash Memory Partitions 35
- User Configuration 36
- Factory Configuration 36
- Persistent Data 36
- Configuration-Status LEDs 37
- SW8 – CPU Reset 38
- SW9 – Factory Config 38
- SW10 – Reset, Config 38
- Connectors (J24 39
- & J5) 39
- 2–32 Altera Corporation 40
- ° compared to J24 41
- Clock Circuitry 42
- Power-Supply 43
- Circuitry 43
- 2–36 Altera Corporation 44
- Power-Supply Circuitry 44
- Appendix A. Shared Bus Table 45
- Shared Data 46
- WE_n.ACC 47
- A–4 Altera Corporation 48
- July 2005 48
- Description 48
- Appendix B. Restoring the 49
- B–2 Altera Corporation 50
- Appendix C. Connecting to the 51
- Board via Ethernet 51
- Connecting the 52
- LCD Screen 52
- Obtaining an IP 52
- LAN Connection 53
- Point–to–Point Connections 54
- Browsing to Your 55
- C–6 Altera Corporation 56
- Browsing to Your Board 56
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