Altera Nios Development Board Cyclone II Edition Manual de usuario descargar pdf (Pagina 17)

Altera Corporation Reference Manual 2–5

May 2007 Nios Development Board Cyclone II Edition

Board Components

Individual LEDs

(D0 - D7)

This Nios development board provides eight individual LEDs connected

to the FPGA. Refer to “Push-Button Switches (SW0 - SW3)” on page 2–4.

D0 – D7 are connected to general purpose I/O pins on the FPGA as

shown in Table 2–4. When a pin drives logic 0, the corresponding LED

turns on.

Seven-Segment

LEDs (U8 & U9)

U8 and U9 connect to the FPGA, and each segment is individually

controlled by a general-purpose I/O pin. Refer to Figure 2–3. When a pin

drives logic 0, the corresponding U8 and U9 LED turns on. See Table 2–5

for pin-out details.

Figure 2–3. Dual Seven-Segment Display

Table 2–4. LED Pin Table

LED FPGA Pin Board Net Name

D0 AC10 pld_led0

D1 W11 pld_led1

D2 W12 pld_led2

D3 AE8 pld_led3

D4 AF8 pld_led4

D5 AE7 pld_led5

D6 AF7 pld_led6

D7 AA11 pld_led7

U8 U9

1 2 ... 12 13 14 15 16 17 18 19 20 21 22 ... 63 64

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Altera Nios Development Board Cyclone II Edition Manual de usuario Pagina 17