Altera IP Compiler for PCI Express Manual de usuario descargar pdf (Pagina 266)

15–34 Chapter 15: Testbench and Design Example

BFM Procedures and Functions

IP Compiler for PCI Express User Guide August 2014 Altera Corporation

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ebfm_barrd_nowt

—reads data from an offset of a specific endpoint BAR and stores

it in the BFM shared memory. This procedure returns as soon as the request has

been passed to the VC interface module for transmission, allowing subsequent

reads to be issued in the interim.

These routines take as parameters a BAR number to access the memory space and the

BFM shared memory address of the

bar_table

data structure that was set up by the

ebfm_cfg_rp_ep

procedure. (Refer to “Configuration of Root Port and Endpoint” on

page 15–28.) Using these parameters simplifies the BFM test driver routines that

access an offset from a specific BAR and eliminates calculating the addresses assigned

to the specified BAR.

The root port BFM does not support accesses to endpoint I/O space BARs.

For further details on these procedure calls, refer to the section “BFM Read and Write

Procedures” on page 15–34.

BFM Procedures and Functions

This section describes the interface to all of the BFM procedures, functions, and tasks

that the BFM driver uses to drive endpoint application testing.

1 The last subsection describes procedures that are specific to the chaining DMA design

example.

This section describes both VHDL procedures and functions and Verilog HDL

functions and tasks where applicable. Although most VHDL procedure are

implemented as Verilog HDL tasks, some VHDL procedures are implemented as

Verilog HDL functions rather than Verilog HDL tasks to allow these functions to be

called by other Verilog HDL functions. Unless explicitly specified otherwise, all

procedures in the following sections also are implemented as Verilog HDL tasks.

1 You can see some underlying Verilog HDL procedures and functions that are called by

other procedures that normally are hidden in the VHDL package. You should not call

these undocumented procedures.

BFM Read and Write Procedures

This section describes the procedures used to read and write data among BFM shared

memory, endpoint BARs, and specified configuration registers.

The following procedures and functions are available in the VHDL package

altpcietb_bfm_rdwr.vhd or in the Verilog HDL include file altpcietb_bfm_rdwr.v.

These procedures and functions support issuing memory and configuration

transactions on the PCI Express link.

All VHDL arguments are subtype

natural

and are input-only unless specified

otherwise. All Verilog HDL arguments are type

integer

and are input-only unless

specified otherwise.

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