Altera Cyclone V GT FPGA Development Board Manual de usuario descargar pdf (Pagina 6)

1–2 Chapter 1: Overview

Board Component Blocks

Cyclone V GT FPGA Development Board September 2014 Altera Corporation

Reference Manual

Board Component Blocks

The development board features the following major component blocks:

■ One Cyclone V GT FPGA (5CGTFD9E5F35C7N) in a 1152-pin FineLine BGA

(FBGA) package

■ FPGA configuration circuitry

■ MAX

V CPLD (5M2210ZF256C4N) in a 256-pin FBGA package as the System

Controller

■ MAX II CPLD (EPM570GT100C3N) in a 100-pin FBGA package as part of the

embedded USB-Blaster

II for use with the Quartus

II Programmer

■ MAX II CPLD (EPM570ZM100) in a 100-pin MBGA package for use with ASSP

(optional)

■ Flash fast passive parallel (FPP) configuration

■ Clocking circuitry

■ Si570 and Si571 programmable oscillators

■ 50-MHz, 100-MHz, and 125-MHz oscillators

■ Memory

■ DDR3 SDRAM

■ DDR3A provides 256 Mbyte (MB) with ECC using three devices, each

having a 16-bit interface to a hard memory controller

■ DDR3B provides 512 MB using four devices, each having a 16-bit interface

to a soft memory controller

■ One 1-gigabit (Gb) synchronous flash with a 16-bit data bus

■ Communication Ports

■ One PCI Express x4 Gen1 socket

■ Two universal HSMC ports

■ One Gigabit Ethernet port

■ One serial digital interface (SDI) port (optional)

■ One SMA clock or data output

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Altera Cyclone V GT FPGA Development Board Manual de usuario Pagina 6