
2–10 Chapter 2: Board Components
MAX II CPLD EPM2210 System Controller
Arria V GT FPGA Development Board December 2014 Altera Corporation
Reference Manual
FM_A8
R18 1.8-V FM bus address
FM_A9
N15 1.8-V FM bus address
FM_A10
P16 1.8-V FM bus address
FM_A11
N14 1.8-V FM bus address
FM_A12
P18 1.8-V FM bus address
FM_A13
M15 1.8-V FM bus address
FM_A14
N16 1.8-V FM bus address
FM_A15
P17 1.8-V FM bus address
FM_A16
N13 1.8-V FM bus address
FM_A17
M14 1.8-V FM bus address
FM_A18
N17 1.8-V FM bus address
FM_A19
M13 1.8-V FM bus address
FM_A20
N18 1.8-V FM bus address
FM_A21
M12 1.8-V FM bus address
FM_A22
M16 1.8-V FM bus address
FM_A23
K14 1.8-V FM bus address
FM_A24
K18 1.8-V FM bus address
FM_A25
K15 1.8-V FM bus address
FM_A26
H17 1.8-V FM bus address
FM_D0
L16 1.8-V FM data bus
FM_D1
M18 1.8-V FM data bus
FM_D2
L14 1.8-V FM data bus
FM_D3
L17 1.8-V FM data bus
FM_D4
L13 1.8-V FM data bus
FM_D5
L18 1.8-V FM data bus
FM_D6
M17 1.8-V FM data bus
FM_D7
L15 1.8-V FM data bus
FM_D8
K16 1.8-V FM data bus
FM_D9
K17 1.8-V FM data bus
FM_D10
D15 1.8-V FM data bus
FM_D11
C17 1.8-V FM data bus
FM_D12
E15 1.8-V FM data bus
FM_D13
C16 1.8-V FM data bus
FM_D14
D16 1.8-V FM data bus
FM_D15
E14 1.8-V FM data bus
FMC_C2M_PG
P6 2.5-V FMC card to module power good
FMC_M2C_PG
T4 2.5-V FMC module to card power good
FMC_PRSNT
U3 2.5-V FMC module present
FMC_SCL
R5 2.5-V FMC module clock
Table 2–5. MAX II CPLD EPM2210 System Controller Device Pin-Out (Part 2 of 5)
Schematic Signal Name
MAX II CPLD
Pin Number
I/O Standard Description
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