
Chapter 4: Functional Description 4–36
ALTDQ_DQS Megafunction Ports
© February 2012 Altera Corporation ALTDLL and ALTDQ_DQS Megafunctions User Guide
DQS OE Path Megafunction Ports
Table 4–13 summarizes all the ports on the megafunction that configure the DQS OE
path.
Table 4–13. Megafunction Ports to Configure DQS OE Path
Port Name Type
Optional/
Required Default Description
dqs_areset Input Optional GND This port is connected to the DQS_OE_FF:clrn,
DQS_OE_DDIO_OE:areset, and
DQS_OE_HR_DDIO_OUT:areset ports that is
used to asynchronously reset all registers in those
blocks.
dqs_hr_oe_in[1..0] Input Optional GND This 2-bit port is connected to the
DQS_OE_HR_DDIO_OUT:datainhi
/datainlo port that is used as the output enable for
the half-rate registers in that block.
dqs_hr_output_reg_clk Input Optional GND This port is connected to the
DQS_OE_HR_DDIO_OUT:clkhi / clklo /
muxsel ports that is used to clock the half-rate
registers in those blocks.
dqs_oe_in Input Optional GND This port feeds the DQS_OE_FF:d,
DQS_OE_DDIO_OE:oe,
DQS_OE_DELAY_CHAIN1:datain,
DQS_OE_DELAY_CHAIN2:datain, or
dqs_oe_out port. For information about how to
enable these blocks, refer to “Parameter Settings” on
page 3–1.
dqs_oe_out Output Optional — This port receives the output signal from the
DQS_OE_DELAY_CHAIN2:dataout,
DQS_OE_DELAY_CHAIN1:dataout,
DQS_OE_FF:q, DQS_OE_DDIO_OE:dataout,
or dqs_oe_in port. For information about how to
enable these blocks, refer to “Parameter Settings” on
page 3–1.
dqs_output_reg_clk Input Optional GND This port is connected to the DQS_OE_FF:clk and
the DQS_OE_DDIO_OE:clk ports that is used to
clock the registers in those blocks.
dqs_output_reg_clkena Input Optional V
CC
This port is connected to the DQS_OE_FF:ena and
the DQS_OE_DDIO_OE:ena ports that is used as
output enable for the registers in those block.
dqs_sreset Input Optional GND This port is connected to the DQS_OE_FF:sclr
and DQS_OE_DDIO_OE:sreset ports that is used
to synchronously reset all registers in those blocks.
Comentarios a estos manuales