Altera Stratix V Advanced Systems Development Board Manual de usuario descargar pdf (Pagina 27)

Chapter 2: Board Components 2–17

Configuration, Status, and Setup Elements

January 2014 Altera Corporation Stratix V Advanced Systems Development Board

Reference Manual

Figure 2–4 shows the PFL configuration.

f For more information on the flash memory map storage, refer to the Stratix V

Advanced Systems Development Kit User Guide.

FPGA Programming from Serial Flash Memory

Each FPGA has an EPCQ (serial flash memory) that connects to it’s Active Serial (AS)

configuration pins. On board power-up, each FPGA can be configured via AS x4

mode from the EPCQ device. The contents of the EPCQ devices are written using the

Altera Serial Flash Loader through the Stratix V GX FPGAdevice.

1 To write to the EPCQ device or configure the FPGA via AS x4 mode, the respective

FPGA must have it’s MSEL[4:0] pins set to AS x4 mode.

Figure 2–4. PFL Configuration

MAX V CPLD

System Controller

FPGA_DATA [7:0]

FPGA1_DCLK

FLASH_A [25:1]

FLASH_D [31:0]

FPP Port

DATA [7:0]

DCLK

INIT_DONE

nSTATUS

nCONFIG

CONF_DONE

MSEL0

MSEL1

MSEL2

MSEL3

2.5 V

10 kΩ

nCE

FPGA1

FPGA2

CFI Flash

1 kΩ

FLASH_CEn

FLASH_OEn

FLASH_WEn

FLASH_A [25:0]

FLASH_D [15:0]

FLASH_CEn

FLASH_OEn

FLASH_WEn

FLASH_WPn

FLASH_ADVn

FPGA1_nCONFIG

FPGA1_CONF_DONE

FLASH_RYBSYn

FPGA1_nSTATUS

FPGA1_nCE

ERROR

LOAD

FACTORY

1.8 V

10 kΩ

2.5 V

FLASH_RYBSYn

PGM_SEL

10 kΩ

FLASH_CLK

FLASH_RSTn

FLASH_RESETn

50 MHz

100 MHz

PGM_CONFIG

MAX_RESETn

2.5 V

1 kΩ

MSEL4

MSEL[4:0] also

connects to MAX V

FPGA1_INIT_DONE

FPGA2_DCLK

FPGA2_nCONFIG

FPGA2_CONF_DONE

FPGA2_nSTATUS

FPGA2_nCE

FPGA2_INIT_DONE

2.5 V

56.2 Ω

CLK_SEL

CLK_ENABLE

USER_PGM

USB_SELECT

DIP Switch

FPP Port

DATA [7:0]

DCLK

INIT_DONE

nSTATUS

nCONFIG

CONF_DONE

MSEL0

MSEL1

MSEL2

MSEL3

2.5 V

10 kΩ

nCE

2.5 V

1 kΩ

MSEL4

MSEL[4:0] also

connects to MAX V

DIP Switch

PGM_LED0

PGM_LED1

PGM_LED2

2.5 V

56.2 Ω

10 kΩ

1 2 ... 22 23 24 25 26 27 28 29 30 31 32 ... 83 84

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Altera Stratix V Advanced Systems Development Board Manual de usuario Pagina 27

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