Altera Stratix II GX PCI Express Development Board Manual de usuario descargar pdf (Pagina 40)

2–30 Reference Manual Altera Corporation

Stratix II GX PCI Express Development Board August 2006

Standard Communication Ports

Table 2–22 lists GigE PHY layer component reference information.

Table 2–23 lists GigE PHY pin-out and corresponding Stratix II GX device

pin numbers.

Table 2–22. Component Reference GigE PHY Layer

Board

Reference

Device Description Manufacturer

Manufacturer Part

Number

Manufacturer

Website

U1 10/100/1000 GigE PHY Marvel Electronics 88E1111 www.marvell.com

Table 2–23. GigE PHY Pin-Out (Part 1 of 2)

Schematic Signal Name Stratix II GX Device Pin Number

enet_col C26

enet_crs D31

enet_gtx_clk B33

enet_intn A29

enet_mdc A28

enet_mdio E34

enet_resetn H31

enet_rx_clk M27

enet_rx_dv E28

enet_rx_er G24

enet_rxd[0] G28

enet_rxd[1] A35

enet_rxd[2] D23

enet_rxd[3] C28

enet_rxd[4] B24

enet_rxd[5] F25

enet_rxd[6] C32

enet_rxd[7] G26

enet_tx_clk F28

enet_tx_en A37

enet_tx_er P22

enet_txd[0] N24

enet_txd[1] J27

enet_txd[2] C24

1 2 ... 35 36 37 38 39 40 41 42 43 44 45 ... 69 70

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Altera Stratix II GX PCI Express Development Board Manual de usuario Pagina 40