Altera Nios Development Board Manual de usuario Pagina 9
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Valorado. / 5. Basado en revisión del cliente
Altera Corporation 1–1
September 2004
Board Components
Features
■ A Stratix
TM
EP1S10F780C6 device
■ 8 Mbytes of flash memory
■ 1 Mbyte of static RAM
■ 16 Mbytes of SDRAM
■ On board logic for configuring the Stratix device from flash memory
■ On-board Ethernet MAC/PHY device
■ Two 5-V-tolerant expansion/prototype headers each with access to
41 Stratix user I/O pins
■ CompactFlash
TM
connector header for Type I CompactFlash (CF)
cards
■ Mictor connector for hardware and software debug
■ Two RS-232 DB9 serial ports
■ Four push-button switches connected to Stratix user I/O pins
■ Eight LEDs connected to Stratix user I/O pins
■ Dual 7-segment LED display
■ JTAG connectors to Altera
®
devices via Altera download cables
■ 50 MHz oscillator and zero-skew clock distribution circuitry
■ Power-on reset circuitry
General
Description
The Nios development board, Stratix Edition, provides a hardware
platform for developing embedded systems based on Altera Stratix
devices. The Nios development board, features a Stratix EP1S10F780C6
device with 10,570 logic elements (LEs) and 920, 448 bits of on-chip
memory.
The Nios development board comes pre-programmed with a Nios II
processor reference design. Hardware designers can use the reference
design as an example of how to use the features of the Nios development
board. Software designers can use the pre-programmed Nios II processor
design on the board to begin prototyping software immediately.
This document describes the hardware features of the Nios development
board, including detailed pin-out information, to enable designers to
create custom FPGA designs that interface with all components on the
board.
f See the Nios II Development Kit, Getting Started User Guide for instructions
on setting up the Nios development board and installing Nios II
development tools.
- Nios Development Board 1
- MNL-N2DEVLBDSTX-1.1 2
- About this Manual 3
- How to Contact 4
- Typographic 5
- Conventions 5
- September 2004 6
- Contents 7
- Block Diagram 10
- Default Reference Design 10
- Development 11
- Components 11
- The Stratix 12
- EP1S10 Device 12
- Flash Memory 12
- Connector 13
- CompactFlash 13
- Pins on CompactFlash 15
- SDRAM Device 16
- Dual SRAM 18
- Altera Corporation 1–11 19
- Board Components 19
- Altera Corporation 1–13 21
- Expansion 22
- Prototype 22
- (PROTO2) 22
- Altera Corporation 1–15 23
- Altera Corporation 1–17 25
- Serial Port 26
- Connectors 26
- Dual 7-Segment 27
- Push-Button 28
- Switches 28
- Individual LEDs 28
- Configuration 29
- Controller 29
- (EPM7128AE) 29
- 1–22 Altera Corporation 30
- The Configuration-Status LEDs 32
- SW8 – CPU Reset 33
- Power-Supply 34
- Circuitry 34
- Clock Circuitry 35
- JTAG Connectors 36
- ° compared to J24 37
- 1–30 Altera Corporation 38
- Appendix A. Shared Bus Table 39
- Shared Data 40
- A–4 Altera Corporation 42
- September 2004 42
- Description 42
- Appendix B. Restoring the 43
- Factory Configuration 43
- Reprogramming 44
- Appendix C. Connecting to the 45
- Board via Ethernet 45
- Connecting the 46
- LCD Screen 46
- Obtaining an IP 46
- Static IP Address 47
- Point–to–Point Connections 48
- Browsing Your 49
- C–6 Altera Corporation 50
- Browsing Your Board 50
- Altera Corporation Index–1 51
- Index–2 Altera Corporation 52
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