Altera Remote Update IP Core Manual de usuario descargar pdf (Pagina 13)

Name Port Required? Description

reset_timer

Input

No Reset signal for watchdog timer.

Signal indicating the internal watchdog timer should

be reset. Unlike other inputs, this signal is not

affected by the busy signal and can reset the timer

even when busy is asserted.

A falling edge of this signal triggers a reset of the user

watchdog timer.

This signal cannot be used in local update mode.

For the timing specification of this parameter, refer to

the specific device handbook.

clock

Input

Yes Clock input to the remote update block.

Clock input to control the machine and to drive the

remote update block during the update of parameters.

This port must be connected to a valid clock.

reset

Input

Yes This is an active high signal. Asserting this signal high

will reset the IP core.

Asynchronous reset input to the IP core to initialize

the machine to a valid state. The machine must be

reset before first use, otherwise the state is not

guaranteed to be valid.

busy

Output

No Busy signal that indicates when remote update block

is reading or writing data.

While this signal is asserted, the machine ignores

most of its inputs and cannot be altered until the

machine deasserts this signal. Therefore, changes are

made only when the machine is not busy.

This signal goes high when read_param or write_

param is asserted, and remains high until the read or

write operation completes.

UG-31005

2015.04.07

Ports

Altera Remote Update IP Core User Guide

Altera Corporation

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