
Altera Corporation 3–15
May 2008 PowerPlay Early Power Estimator For Arria GX FPGAs
Using the PowerPlay Early Power Estimator
Figure 3–7. DSP Section in the PowerPlay Early Power Estimator
General I/O Pins
Arria GX devices feature programmable I/O pins that support a wide
range of industry I/O standards for increased design flexibility. The I/O
section in the PowerPlay Early Power Estimator spreadsheet allows you
to estimate the I/O pin power consumption based on the pin’s I/O
standards.
1 The PowerPlay Early Power Estimator spreadsheet assumes
you are using external termination resistors when you design
with I/O standards that recommend termination resistors (SSTL
and HSTL). If your design does not use external termination
resistors, you should choose the LVTTL I/O standard with the
same V
CCIO
and similar drive strength as the terminated I/O
standard. For example, if you are using the SSTL-2 class II I/O
standard without termination resistors (using a point-to-point
connection), you should select LVTTL/LVCMOS 2.5-V as your
I/O standard and 16mA as the Drive Strength in the PowerPlay
Early Power Estimator.
The power reported for I/O signals includes thermal and external I/O
power. The total thermal power is the sum of the thermal power
consumed by the device based on each power rail, for example:
thermal power = thermal P
INT
+ thermal P
PD
+ thermal P
IO
Figure 3–8 shows a graphical representation of the I/O power
consumption. The I
CCIO
rail power includes both the thermal P
IO
and the
external P
IO
.
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