Altera Designing With Low-Level Primitives Manual de usuario Pagina 23

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Altera Corporation 2–1
April 2007
2. Primitive Reference
Primitives
Using primitives with HDL is an efficient way to make assignments to
your design without using the Assignment Editor.
The Quartus
®
II software supports the following primitives, described on
the corresponding pages:
“ALT_INBUF”
“ALT_OUTBUF” on page 2–3
“ALT_OUTBUF_TRI” on page 2–6
“ALT_IOBUF” on page 2–8
“ALT_INBUF_DIFF” on page 2–11 (1)
“ALT_OUTBUF_DIFF” on page 2–13 (1)
“ALT_OUTBUF_TRI_DIFF” on page 2–14 (1)
“ALT_IOBUF_DIFF” on page 2–19 (1)
“ALT_BIDIR_DIFF” on page 2–22 (1)
“ALT_BIDIR_BUF” on page 2–25 (1)
“LCELL” on page 2–27
“DFF” on page 2–28
“CARRY and CARRY_SUM” on page 2–29
“CASCADE” on page 2–30
“LUT_INPUT” on page 2–31
“LUT_OUTPUT” on page 2–32
Note to the above list:
(1) These I/O primitives are supported only in Stratix
®
III and Cyclone
®
III device
families.
ALT_INBUF
The primitive allows you to make a location assignment, termination
assignment, and also lets you determine whether to use weak pull up
resistor, whether to enable bus-hold circuitry or an io_standard
assignment to an input pin from a lower-level entity. Table 2–1 describes
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